With rapid growing of transistors amount in an integrated circuit (IC), areas of chip being used is increased accordingly, resulting problems such as delay time and power consumption of signal to get worse each day. In order to improve such critical problem in delay time and power consumption, a three dimensional IC (3DIC) stacking technology is an effective solution under development today. Said technology performs vertically stacking to a plurality of chips in 3D space, signals and power voltages are transmitted by utilizing through silicon vias (TSVs) being passed through silicon substrates in between different chips, so as to achieve an optimal effect in size reduction.
Processing technology of the 3DIC mainly focused in three steps: first step includes forming TSV channels and filling a conductive metal; second step includes performing a thinner process to wafers; and third step includes stacking and bonding chips together. In the first step, as restricted by the processing technology at the present stage, an insulating thin film (e.g., SiO2) on sidewalls of TSVs may be broken or invaded by foreign impurity, resulting an open-circuit of the TSVs or a short-circuit of the silicon substrate. Also, in the third step when a plurality of ICs are stacked, due to small position offset, the TSVs may not be correctly turned on to each other, resulting an open-circuit, that is, TSVs may fail to provide effective paths between different chips for transmitting signal.
In conventional 2DIC design, said problem in data transmission may be prevented by utilizing a plurality of paths to transmit the same signal at the same time. However, in 3DIC technology, once one of the TSVs has short-circuit on the silicon substrate, leakage current generated by power voltage may flow into the silicon substrate through the TSV, resulting overall voltage level in the silicon substrate to shift and become unstable, such that errors in transmission may occur since signals transmitted in other TSVs may also be affected by shifted voltage level in the silicon substrate. Therefore, many of manufacturers in 3DIC field are in searching for a bidirectional data transmission circuit with capabilities of automatically detecting short defect of the TSVs and self-repairing data.